Details

Autor(en) / Beteiligte

• Domae, S.
• Masuda, H.
• Tateiwa, K.
• Kato, Y.
• Fujimoto, M.

Titel

Stress-induced voiding in stacked tungsten via structure

Ist Teil von

• 1998 IEEE International Reliability Physics Symposium Proceedings. 36th Annual (Cat. No.98CH36173), 1998, p.318-323

Ort / Verlag

IEEE

Erscheinungsjahr

1998

Quelle

IEL

Beschreibungen/Notizen

• Stress-induced voiding (SV) in Al-alloy films with stacked tungsten via structures was investigated using new test structures. Voids were found in interconnections with stacked and borderless vias that had increased resistance after aging tests. Failure occurs most frequently when the test structures are stored at around 250/spl deg/C. This behavior can be explained by the diffusion creep model as being like SV in a flat line (McPherson and Dunn, 1987). A model of SV was obtained from thermal stress simulation and transmission electron microscopy (TEM) observation. Stress increases between upper and lower plugs with temperature increases over 175/spl deg/C. Grains, which have high-angle misorientation, are often found above plugs. The tensile stress and grain misorientation should accelerate the void growth. O/sub 2/ plasma post metal etch treatment was found to be effective for elimination of SV in stacked via structures.