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Realization of vertical resistive memory (VRRAM) using cost effective 3D process
Ist Teil von
2011 International Electron Devices Meeting, 2011, p.31.8.1-31.8.4
Ort / Verlag
IEEE
Erscheinungsjahr
2011
Quelle
IEEE Xplore
Beschreibungen/Notizen
Vertical ReRAM (VRRAM) has been realized with modification of Vertical NAND (VNAND) process and architecture as a cost-effective and extensible technology for future mass data storage. Dedicated ALD/CVD deposition and wet etching processes were developed to reproduce planar ReRAM properties in VRRAM structure. Multi-stack of VRRAM cell layers were fabricated at the same time using ALD TaOx/barrier layer/CVD TiN cell stacks. Oxidation control without intermixing has been found very critical in the vertical ReRAM cell process.