Details

Autor(en) / Beteiligte

• Huguenin, J.-L
• Monfray, S
• Bidal, G
• Denorme, S
• Perreau, P
• Barnola, S
• Samson, M.-P
• Arvet, C
• Benotmane, K
• Loubet, N
• Liu, Q
• Campidelli, Y
• Leverd, F
• Abbate, F
• Clement, L
• Borowiak, C
• Cros, A
• Bajolet, A
• Handler, S
• Marin-Cudraz, D
• Benoist, T
• Galy, P
• Fenouillet-Beranger, C
• Faynot, O
• Ghibaudo, G
• Boeuf, F
• Skotnicki, T

Titel

Hybrid Localized SOI/bulk technology for low power system-on-chip

Ist Teil von

• 2010 Symposium on VLSI Technology, 2010, p.59-60

Ort / Verlag

IEEE

Erscheinungsjahr

2010

Quelle

IEEE Electronic Library Online

Beschreibungen/Notizen

• This paper highlights the successful co-integration of Localized Silicon-On-Insulator (LSOI) devices and of bulk-Si I/O devices on the same chip. LSOI devices present good logic performances and very low mismatch values down to 1.2mV/μm. In addition, we show the backbiasing impact on LSOI SRAM bit-cells for stability improvement. This work also presents the co-integration of LSOI with bulk devices as a solution for the devices that are not compatible with thin-body technology. In particular, we demonstrate for the first time competitive bulk co-integrated ElectroStatic Discharge (ESD) protections.