Details

Autor(en) / Beteiligte

• Qingzheng Li
• Guixuan Liang
• Bermak, A.

Titel

A High-speed 32-bit Signed/Unsigned Pipelined Multiplier

Ist Teil von

• 2010 Fifth IEEE International Symposium on Electronic Design, Test & Applications, 2010, p.207-211

Ort / Verlag

IEEE

Erscheinungsjahr

2010

Quelle

IEEE Electronic Library (IEL)

Beschreibungen/Notizen

• In this paper, a novel unified implementation of signed/unsigned multiplication is proposed using a simple sign-control unit together with a line of multiplexers. The proposed approach is demonstrated through a 0.18 ¿m CMOS implementation of a 32-bit signed/unsigned multiplier. Reported results show that the proposed unified signed/unsigned implementation is very compact with only 0.45% silicon area overhead. The critical path delay of the proposed multiplier is about 3.13 ns.