Details

Autor(en) / Beteiligte

• Cernea, R.
• Lee, D.J.
• Mofidi, M.
• Chang, E.Y.
• Wy-Yi Chien
• Goh, L.
• Yupin Fong
• Yuan, J.H.
• Samachisa, G.
• Guterman, D.C.
• Mehrotra, S.
• Sato, K.
• Onishi, H.
• Ueda, K.
• Noro, F.
• Mijamoto, K.
• Morita, M.
• Umeda, K.
• Kubo, K.

Titel

A 34 Mb 3.3 V serial flash EEPROM for solid-state disk applications

Ist Teil von

• Proceedings ISSCC '95 - International Solid-State Circuits Conference, 1995, p.126-127

Ort / Verlag

IEEE

Erscheinungsjahr

1995

Quelle

IEEE Electronic Library (IEL)

Beschreibungen/Notizen

• This 34 Mb 3.3 V serial flash EEPROM for solid state disk applications has on-board digitally-controlled power registers compatible to the existing serially-controlled command architecture. A bank of high-linearity current-referenced DACs with fast-slewing regulated supply buffers creates multiple internal voltage sources that are completely accessible (and measurable) by the dedicated external controller. Also, new to this design is a verify (VFY) function that operates simultaneously with programming (PGM) and eliminates the need for an iterative PGM/VFY sequence. The die is fabricated using a triple poly single metal twin well 0.55 /spl mu/m CMOS process with memory cell size of 2.1 /spl mu/m/sup 2/.