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2008 IEEE International Conference on Electron Devices and Solid-State Circuits, 2008, p.1-4
2008
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Autor(en) / Beteiligte
Titel
Multipath reversed nested Miller compensation with voltage buffer for low-power three-stage amplifiers
Ist Teil von
  • 2008 IEEE International Conference on Electron Devices and Solid-State Circuits, 2008, p.1-4
Ort / Verlag
IEEE
Erscheinungsjahr
2008
Quelle
IEEE Xplore
Beschreibungen/Notizen
  • A multipath reversed nested Miller compensation (MRNMC) scheme with voltage buffer (MRNMCVB) is presented in this paper. By using an efficient voltage buffer, a low-voltage, low-power, three-stage RNMC amplifier topology suitable for large capacitive load applications is constructed with a noninverting intermediate stage. Moreover, the internal feedback loop introduced by the buffer prevents the reduction in high-frequency gain and extends the bandwidth of the amplifier significantly. Furthermore, a multipath feedforward stage is added to generate a left-half-plane (LHP) zero, which improves the stability of the amplifier and reduces the size of compensation capacitors simultaneously. An optimized MRNMCVB amplifier has been implemented in a 0.35-mum CMOS process. The amplifier driving a 500-pF load capacitor achieves 1.76-MHz unity-gain frequency (UGF), 59deg phase margin, and 0.88-V/mus average slew rate, while dissipating only 45-muW power at a 1.5-V supply. The total capacitor value is just 2.92-pF.
Sprache
Englisch
Identifikatoren
ISBN: 1424425395, 9781424425396
DOI: 10.1109/EDSSC.2008.4760676
Titel-ID: cdi_ieee_primary_4760676

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