Details

Autor(en) / Beteiligte

• Vobecky, J.
• Rahimo, M.
• Kopta, A.
• Linder, S.

Titel

Exploring the Silicon Design Limits of Thin Wafer IGBT Technology: The Controlled Punch Through (CPT) IGBT

Ist Teil von

• 2008 20th International Symposium on Power Semiconductor Devices and IC's, 2008, p.76-79

Ort / Verlag

IEEE

Erscheinungsjahr

2008

Quelle

IEEE Electronic Library (IEL)

Beschreibungen/Notizen

• The paper introduces a new controlled punch through (CPT) IGBT buffer for next generation devices, which utilise thin wafers technology. The new concept is based on very shallow buffers with optimized doping profiles enabling minimum silicon design thicknesses close to the theoretical limit for a given voltage class. The advanced shaping of the buffer doping profile brings additional degree of freedom in IGBT design. The work was carried out for 1200V IGBTs, but the CPT buffer can be applied with advantages to any voltage class. While this approach is targeting mainly reduced ON-State losses, the IGBT maintains good blocking, soft turn-off, wide SOA and good short circuit capability.