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2007 International Symposium on Semiconductor Manufacturing, 2007, p.1-3
Ort / Verlag
IEEE
Erscheinungsjahr
2007
Quelle
IEEE Xplore
Beschreibungen/Notizen
With shrinking geometries and adoption of lower k dielectrics and thinner barriers to minimize device RC delay, there is a need for advanced patterning schemes. Hardmask technology is on demand as the photoresist(PR) films used in semiconductor fabrication need to be thinner to etch sub-45 nm devices. Hardmask films provide high etch selectivity to low-k dielectrics and photoresist, serve as an anti-reflective coating, allowing partial via etch approach and eliminating ULK damage caused by the resist ash strip process. We have optimized PVD TiN process through hardware, process modifications to meet all the requirements of hardmask technology. We also present preliminary etch rate data and via profiles demonstrating the benefits of TiN hardmask. Further work to characterize adhesion and electrical performance is underway.