Details

Autor(en) / Beteiligte

• Han Xiao, Han Xiao
• Ru Huang, Ru Huang
• Jiale Liang, Jiale Liang
• Hongwei Liu, Hongwei Liu
• Yu Tian, Yu Tian
• Yangyuan Wang, Yangyuan Wang
• Runsheng Wang, Runsheng Wang

Titel

The Localized-SOI MOSFET as a Candidate for Analog/RF Applications

Ist Teil von

• IEEE transactions on electron devices, 2007-08, Vol.54 (8), p.1978-1984

Ort / Verlag

New York, NY: IEEE

Erscheinungsjahr

2007

Quelle

IEEE/IET Electronic Library (IEL)

Beschreibungen/Notizen

• In this paper, the characteristics of a localized-SOI (L-SOI) MOSFET are investigated for analog/RF applications. In the L-SOI device, the source/drain regions are quasi-surrounded by L-type oxide layers to reduce junction capacitance and avoid source/drain punchthrough, while the channel is directly connected with the substrate to alleviate the self-heating effect. Such structures can combine the advantages of both bulk and SOI MOSFETs and avoid their issues. Due to the unique structure of this novel device, the L-SOI MOSFET can exhibit excellent analog/RF behaviors. Higher g m / I ds ratio and intrinsic gain ( g m / g ds )can be received compared with the conventional SOI structure, particularly at low gate bias. Higher and , which are due to higher g m and reduced gate capacitance, can be observed in the L-SOI MOSFET. In addition, better noise performance can be achieved resulting from reduced lattice temperature and improved g m . Thus, the L-SOI MOSFET can be considered as one of the potential candidates for analog/RF applications.