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Proceedings of the Design Automation & Test in Europe Conference, 2006, Vol.1, p.1-6
2006
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Details

Autor(en) / Beteiligte
Titel
An Integrated Open Framework for Heterogeneous MPSoC Design Space Exploration
Ist Teil von
  • Proceedings of the Design Automation & Test in Europe Conference, 2006, Vol.1, p.1-6
Ort / Verlag
IEEE
Erscheinungsjahr
2006
Quelle
IEEE Electronic Library Online
Beschreibungen/Notizen
  • In recent years, increasing manufacturing density has allowed the development of multi-processor systems-on-chip (MPSoCs). Application-specific instruction set processors (ASIPs) stand out as one of the most efficient design paradigms and could be especially effective as SoC computing engines. However, multiple hurdles which are hindering the productivity of SoC designers and researchers must be solved first. Among them, the difficulty of thoroughly exploring the design space by simultaneously sweeping axes like processing elements, memory hierarchies and chip interconnect fabrics. We tackle this challenge by proposing an integrated approach where state-of-the-art platform modeling infrastructures, at the IP core level and at the system level, meet to provide the designer with maximum openness and flexibility in terms of design space exploration
Sprache
Englisch
Identifikatoren
ISBN: 3981080114, 9783981080117
ISSN: 1530-1591
eISSN: 1558-1101
DOI: 10.1109/DATE.2006.244000
Titel-ID: cdi_ieee_primary_1657065

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