Details

Autor(en) / Beteiligte

• Muhammad, K.
• Ho, Y.C.
• Mayhugh, T.
• Hung, C.M.
• Jung, T.
• Elahi, I.
• Lin, C.
• Deng, I.
• Fernando, C.
• Wallberg, J.
• Vemulapalli, S.
• Larson, S.
• Murphy, T.
• Leipold, D.
• Cruise, P.
• Jaehnig, J.
• Lee, M.C.
• Staszewski, R.B.
• Staszewski, R.
• Maggio, K.

Titel

A discrete time quad-band GSM/GPRS receiver in a 90nm digital CMOS process

Ist Teil von

• Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005, 2005, p.809-812

Ort / Verlag

IEEE

Erscheinungsjahr

2005

Quelle

IEEE Electronic Library (IEL)

Beschreibungen/Notizen

• We present the receiver in the first single-chip GSM transceiver that incorporates full integration of quad-band receiver, transmitter, memory, power management, dedicated ARM processor and RF built-in self test in a 90 nm digital CMOS process. The architecture uses direct RF sampling in the receiver and an all-digital PLL in the transmitter. The receive chain uses discrete-time analog signal processing to down convert, down- sample, filter and analog-to-digital convert the received signal. An auxiliary feedback is provided at the mixer output that can linearize the entire receive chain. The receiver meets a sensitivity of -110 dBm at 60 mA in a 1.4V digital CMOS process