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A novel technique to generate fine resolution hysteresis in decision circuits
Ist Teil von
2003 46th Midwest Symposium on Circuits and Systems, 2003, Vol.3, p.1392-1395 Vol. 3
Ort / Verlag
IEEE
Erscheinungsjahr
2003
Quelle
IEEE Electronic Library (IEL)
Beschreibungen/Notizen
Comparators with hysteresis are commonly used in differential input-output (I/O) receivers to allow fast low power operation with reduced voltage swings for point-to-point transmission. In such applications, a hysteresis of 25-50 mV may be used, with a value of 100 mV also quite common. However, certain other applications, such as caller number identification over standard telephone lines, require the receiver to respond properly to signal swings of around 17 mV. Hence, a technique is required to generate a hysteresis of around 4-6 mV. In this paper, a modification to a typical decision circuit is described, which results in the required levels of hysteresis without using large devices. A test chip has been fabricated in a typical 1.5 /spl mu/m technology and tested to verify the results.