Details

Autor(en) / Beteiligte

• Tun Li
• Dan Zhu
• Yang Guo
• GongJie Liu
• SiKun Li

Titel

MA/sup 2/TG: a functional test program generator for microprocessor verification

Ist Teil von

• 8th Euromicro Conference on Digital System Design (DSD'05), 2005, p.176-183

Ort / Verlag

IEEE

Erscheinungsjahr

2005

Quelle

IEL

Beschreibungen/Notizen

• A novel specification driven and constraints solving based method to automatically generate test programs from simple to complex ones for advanced microprocessors is presented in this paper. Our microprocessor architectural automatic test program generator (MA/sup 2/TG) can produce not only random test programs but also a sequence of instructions for a specific constraint by specifying a user constraints file. The proposed methodology makes three important contributions. First, it simplifies the microprocessor architecture modeling and eases adoption of architecture modification via architecture description language (ADL) specification. Second, it generates test programs for specific constraints utilizing the power of state-to-art constraints solving techniques. Finally, the number of test program for microprocessor verification and the verification time are dramatically reduced. We applied this method on DLX processor to illustrate the usefulness of our approach.