Details

Autor(en) / Beteiligte

• Gherman, V.
• Wunderlich, H.-J.
• Vranken, H.
• Hapke, F.
• Wittke, M.
• Garbers, M.

Titel

Efficient pattern mapping for deterministic logic BIST

Ist Teil von

• 2004 International Conferce on Test, 2004, p.48-56

Ort / Verlag

Piscataway NJ: IEEE

Erscheinungsjahr

2004

Quelle

IEEE Electronic Library (IEL)

Beschreibungen/Notizen

• Deterministic logic BIST (DLBIST) is an attractive test strategy, since it combines advantages of deterministic external testing and pseudo-random LBIST. Unfortunately, previously published DLBIST methods are unsuited for large ICs, since computing time and memory consumption of the DLBIST synthesis algorithms increase exponentially, or at least cubically, with the circuit size. In this paper, we propose a novel DLBIST synthesis procedure that has nearly linear complexity in terms of both computing time and memory consumption. The new algorithms are based on binary decision diagrams (BDDs). We demonstrate the efficiency of the new algorithms for industrial designs up to 2M gates.