Details

Autor(en) / Beteiligte

• Gemmeke, T.
• Noll, T.G.

Titel

A physically oriented model to quantify the dynamic noise margin [on-chip noise]

Ist Teil von

• Proceedings of the 30th European Solid-State Circuits Conference, 2004, p.467-470

Ort / Verlag

IEEE

Erscheinungsjahr

2004

Quelle

IEL

Beschreibungen/Notizen

• The increase in on-chip noise has led to severe signal integrity problems in modern chip design. In a new approach, an analytical, physically motivated model is proposed which quantities the pulse transfer characteristic of a gate, aimed at quick circuit analysis. The accuracy of the model is validated in comparison with simulation results from a circuit simulator. Moreover, its application in a standard design flow is demonstrated. As the model is based on physical circuit parameters, it is also well suited for what-if analysis.