Details

Autor(en) / Beteiligte

• Behzad, A.R.
• Zhong Ming Shi
• Anand, S.B.
• Li Lin
• Carter, K.A.
• Kappes, M.S.
• Tsung-Hsien Lin
• Nguyen, T.
• Yuan, D.
• Wu, S.
• Wong, Y.C.
• Victor Fong
• Rofougaran, A.

Titel

A 5-GHz direct-conversion CMOS transceiver utilizing automatic frequency control for the IEEE 802.11a wireless LAN standard

Ist Teil von

• IEEE journal of solid-state circuits, 2003-12, Vol.38 (12), p.2209-2220

Ort / Verlag

New York: IEEE

Erscheinungsjahr

2003

Quelle

IEEE Xplore

Beschreibungen/Notizen

• A fully integrated CMOS direct-conversion 5-GHz transceiver with automatic frequency control is implemented in a 0.18-/spl mu/m digital CMOS process and housed in an LPCC-48 package. This chip, along with a companion baseband chip, provides a complete 802.11a solution The transceiver consumes 150 mW in receive mode and 380 mW in transmit mode while transmitting +15-dBm output power. The receiver achieves a sensitivity of better than -93.7dBm and -73.9dBm for 6 Mb/s and 54 Mb/s, respectively (even using hard-decision decoding). The transceiver achieves a 4-dB receive noise figure and a +23-dBm transmitter saturated output power. The transmitter also achieves a transmit error vector magnitude of -33 dB. The IC occupies a total die area of 11.7 mm/sup 2/ and is packaged in a 48-pin LPCC package. The chip passes better than /spl plusmn/2.5-kV ESD performance. Various integrated self-contained or system-level calibration capabilities allow for high performance and high yield.