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2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2024, p.395-408
2024

Details

Autor(en) / Beteiligte
Titel
PREFETCHX: Cross-Core Cache-Agnostic Prefetcher-based Side-Channel Attacks
Ist Teil von
  • 2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2024, p.395-408
Ort / Verlag
IEEE
Erscheinungsjahr
2024
Link zum Volltext
Quelle
IEEE/IET Electronic Library (IEL)
Beschreibungen/Notizen
  • In this paper, we reveal the existence of a new class of prefetcher, the XPT prefetcher, in modern Intel processors which has never been officially detailed. It speculatively issues a load, bypassing last-level cache (LLC) lookups, when it predicts that a load request will result in an LLC miss. We demonstrate that XPT prefetcher is shared among different cores, which enables an attacker to build cross-core side-channel and covertchannel attacks. We propose PREFETCHX, a cross-core attack mechanism, to leak users' sensitive data and activities. We empirically demonstrate that PREFETCHX can be used to extract private keys of real-world RSA applications. Furthermore, we show that PREFETCHX can enable side-channel attacks that can monitor keystrokes and network traffic patterns of users. Our two cross-core covert-channel attacks also see a low error rate and a 122KiB/s maximum channel capacity. Due to the cache-independent feature of PREFETCHX, current cache-based mitigations are not effective against our attacks. Overall, our work uncovers a significant vulnerability in the XPT prefetcher, which can be exploited to compromise the confidentiality of sensitive information in both cryptography and non-cryptography-related applications among processor cores.
Sprache
Englisch
Identifikatoren
eISSN: 2378-203X
DOI: 10.1109/HPCA57654.2024.00037
Titel-ID: cdi_ieee_primary_10476423

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