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Design and Wafer-Level Fabrication of Stacked-Type Transformers for High-Density Power Converters
Ist Teil von
IEEE transactions on power electronics, 2024-04, Vol.39 (4), p.4503-4512
Ort / Verlag
New York: IEEE
Erscheinungsjahr
2024
Quelle
IEEE Electronic Library Online
Beschreibungen/Notizen
In response to the emerging demands in the miniaturization and integration of power conversion systems, the stacked-type transformer chips with significantly improved power efficiency for sub-MHz applications are developed in this article. The silicon-embedded high-density multilayer spiral winding structures in the transformer chips are fully metalized using our group developed Zn--Al alloy microelectromechanical system casting technique, which ensures the wafer-level batch fabrication with high consistency. After being assembled with dual E-shape magnetic cores, the fabricated stacked-type transformer chips are measured to demonstrate high inductance integration density of over 1.54 μH/mm 2 and superior coupling coefficient of 0.985 at the targeted operating frequency of 100 kHz. Owing to the compact, low-resistance thick-metal structures, Q -factors of 20.5 at 100 kHz and transformer efficiency of above 85% in a wide frequency range are obtained from the two-port small signal measurements. Switching mode fly-back dc-dc converters are constructed to further validate the power conversion capability of the developed device. Benefiting from the implementation of the stacked-type transformers, the isolated dc-dc converters are measured to operate with an overall power efficiency of up to 82.46% at the 7.5 W power output condition, where an ultra-high power density of 17.64 W/cm 3 is also obtained.