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2023 International Symposium of Electronics Design Automation (ISEDA), 2023, p.263-268
2023
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Autor(en) / Beteiligte
Titel
DAC-CPPR: A fast and accurate approach for common path pessimism removal with divide and conquer on the clock tree
Ist Teil von
  • 2023 International Symposium of Electronics Design Automation (ISEDA), 2023, p.263-268
Ort / Verlag
IEEE
Erscheinungsjahr
2023
Quelle
IEL
Beschreibungen/Notizen
  • To reduce the redundant pessimism in static timing analysis, common path pessimism removal (CPPR) is widely used as a pivotal step. However, as the amount of pessimism that needs to be removed is path-specific, solving the CPPR problem is very expensive and has become the hurdle in deploying the technology. Even though there exit efficient design-specific pruning heuristics, their performance cannot be guaranteed. In this paper, we introduce DAC-CPPR, a CPPR algorithm that is both efficient and with provably good performance. It is based on Divide and Conquer technique on the clock tree. We prove the algorithm has a logarithmic time complexity proportional to the clock tree nodes. Experimental results demonstrate the effectiveness and efficiency of our algorithms.
Sprache
Englisch
Identifikatoren
DOI: 10.1109/ISEDA59274.2023.10218624
Titel-ID: cdi_ieee_primary_10218624

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