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RF Front End Modules (FEMs) are currently achieved using CMOS Silicon-on-insulator (SOI) as the dominant technology for RF switches integration in handsets RF FEMs [1]. But for cost sensitive market requiring less stringent performances (such as WiFi), high resistivity (HR) bulk SiGe BiCMOS technology has been proposed to achieve RF FEM System on Chip (SOC) integration [2], [3]. In this paper, we review the optimization of an advanced 200-mm HR SiGe BiCMOS technology based on a previous 0.13-μm process [4]. State of the art performances have been achieved from RF switch point of view with R ON × C OFF of 169 fs and WiFi SPDT RF switch exhibiting insertion loss of ~0.8 dB @ 5.5 GHz and power handling capability exceeding 31 dBm.