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This paper presents two different topologies of grounded incremental/decremental meminductor emulators. These emulator circuits are designed using two current conveyors, one operational transconductance amplifier, two grounded capacitors, and one or two resistors. The proposed configurations are very simple and have been designed with active blocks whose ICs are directly available in the market. The pinched hysteresis loop which is an essential feature of meminductors, has been obtained for a frequency range up to 300 kHz. The transient and non-volatility behaviours indicate their satisfactory performance. Simulations of the proposed circuits have been carried out with the help of LTspice tool using 180 nm CMOS technology parameters. Non-ideal and precision analyses have been carried out for the proposed emulators to justify their proper functioning in the practical environment. The experimental setup of the suggested emulators using commercially available ICs has also been demonstrated. A chaotic oscillator has also been realized to verify the behavior of the suggested meminductor emulator circuits.
•Meminductor emulator realizations using active blocks available as off-the-shelf ICs in market and a few parasitic components.•Simple configurations with hardware results.•Wide frequency range and easy switching between incremental and decremental characteristics.•Non-ideal and precision analysis along with essential fingerprints.•Validation of performance through Chua's chaotic oscillator.