Details

Autor(en) / Beteiligte

• Chu, Shao-I
• Ke, Syuan-An
• Liu, Sheng-Jung
• Lin, Yan-Wei

Titel

An Efficient Hard-Detection GRAND Decoder for Systematic Linear Block Codes

Ist Teil von

• IEEE transactions on very large scale integration (VLSI) systems, 2023-11, Vol.31 (11), p.1-13

Ort / Verlag

New York: IEEE

Erscheinungsjahr

2023

Quelle

IEEE Electronic Library (IEL)

Beschreibungen/Notizen

• Guessing random additive noise decoding (GRAND) has been recently proposed as a code-agnostic decoding technique for linear block codes, which attempts to guess the possible error pattern applied on the received word to check if the result is a valid codeword. The GRAND with abandonment (GRANDAB) is a hard-detection decoder by limiting the number of generated test error patterns. This article presents efficient algorithms to reduce the number of queries for the GRANDAB when the codes are systematic and cyclic. These methods exploit the properties of the syndrome weight and cyclic codes to significantly improve the decoding latency as the GRANAB corrects up to the error-correcting capability of the code. The VLSI architecture of novel hard-detection GRANDAB is presented, which provides efficient decoding up to 128 bits and can correct up to 3 bit errors at or above the error-correcting capability of the code. The property of syndrome weight is integrated with the dial structure for parallelism, supporting the default mode and the mode of systematic encoding with the known error-correcting capability. When compared to the architecture developed by Abbas et al., the average decoding cycles of two and three errors for the <inline-formula> <tex-math notation="LaTeX">(127,106)</tex-math> </inline-formula> Bose-Chaudhuri-Hocquenghem (BCH) code are improved by <inline-formula> <tex-math notation="LaTeX">30.90 \%</tex-math> </inline-formula> and <inline-formula> <tex-math notation="LaTeX">48.63 \%</tex-math> </inline-formula>, respectively. For the <inline-formula> <tex-math notation="LaTeX">(128, 96)</tex-math> </inline-formula> cyclic redundancy check (CRC) code, the average decoding cycles of two and three errors are reduced by <inline-formula> <tex-math notation="LaTeX">45.19\%</tex-math> </inline-formula> and <inline-formula> <tex-math notation="LaTeX">65.71\%</tex-math> </inline-formula>, respectively. At the signal-to-noise ratio (SNR) of 5 dB, the average latencies for decoding <inline-formula> <tex-math notation="LaTeX">(128,96)</tex-math> </inline-formula> CRC and <inline-formula> <tex-math notation="LaTeX">(127,106)</tex-math> </inline-formula> BCH codes are improved by <inline-formula> <tex-math notation="LaTeX">21.34\%</tex-math> </inline-formula> and <inline-formula> <tex-math notation="LaTeX">12.29\%</tex-math> </inline-formula>. The worst-case latency for decoding the <inline-formula> <tex-math notation="LaTeX">(127,113)</tex-math> </inline-formula> BCH code in the presented design is shorter than that of the work implemented by Riaz et al. with the reduction of <inline-formula> <tex-math notation="LaTeX">98.02\%</tex-math> </inline-formula>. The developed hardware architecture is also superior to the original dial-based design by Abbas et al. in terms of area-time (AT) complexity.