Details

Autor(en) / Beteiligte

• Prenat, Guillaume
• Garello, Kevin
• Langer, Juergen
• Ocker, Berthold
• Cyrille, Marie-Claire
• Gambardella, Pietro
• Tahoori, Mehdi
• Gaudin, Gilles
• Jabeur, Kotb
• Vanhauwaert, Pierre
• Pendina, Gregory Di
• Oboril, Fabian
• Bishnoi, Rajendra
• Ebrahimi, Mojtaba
• Lamard, Nathalie
• Boulle, Olivier

Titel

Ultra-Fast and High-Reliability SOT-MRAM: From Cache Replacement to Normally-Off Computing

Ist Teil von

• IEEE transactions on multi-scale computing systems, 2016-01, Vol.2 (1), p.49-60

Ort / Verlag

IEEE

Erscheinungsjahr

2016

Link zum Volltext

• IEEE_Xplore

Quelle

IEEE Xplore

Beschreibungen/Notizen

• This paper deals with a new MRAM technology whose writing scheme relies on the Spin Orbit Torque (SOT). Compared to Spin Transfer Torque (STT) MRAM, it offers a very fast switching, a quasi-infinite endurance and improves the reliability by solving the issue of "read disturb", thanks to separate reading and writing paths. These properties allow introducing SOT at all-levels of the memory hierarchy of systems and adressing applications which could not be easily implemented by STT-MRAM. We present this emerging technology and a full design framework, allowing to design and simulate hybrid CMOS/SOT complex circuits at any level of abstraction, from device to system. The results obtained are very promising and show that this technology leads to a reduced power consumption of circuits without notable penalty in terms of performance.