IEEE transactions on magnetics, 2020-03, Vol.56 (3), p.1-5
2020
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Details
- Autor(en) / Beteiligte
- Titel
- On Efficient Concatenation of LDPC Codes With Constrained Codes
- Ist Teil von
- IEEE transactions on magnetics, 2020-03, Vol.56 (3), p.1-5
- Ort / Verlag
- New York: IEEE
- Erscheinungsjahr
- 2020
- Quelle
- IEEE Electronic Library Online
- Beschreibungen/Notizen
- In this article, an efficient concatenation of error correction codes with constrained codes is proposed. Generally, constrained codes are designed to match specified channels, whereas error correction coding schemes are designed to correct the channel errors. Both play important roles to ensure the integrity of data in data storage systems. In this study, we first investigate the design of k-constrained codes combined with a low-density parity-check (LDPC) code, and then we extend the idea to the design of dc-free k-constrained LDPC codes. Simulation results show that the proposed designs achieve an improved bit error rate (BER) performance, compared to prior art schemes. In particular, the proposed design for the dc-free k-constrained codes not only fully eliminates the effect of error propagation in a reverse configuration but also achieves significant dc suppression.
- Sprache
- Englisch
- Identifikatoren
- ISSN: 0018-9464eISSN: 1941-0069DOI: 10.1109/TMAG.2019.2957278Titel-ID: cdi_crossref_primary_10_1109_TMAG_2019_2957278
- Format
- –
- Schlagworte
- Balanced codes, Binary system, Bit error rate, Codes, Data storage, dc-free code, Decoding, Design, Encoding, Error correcting codes, Error correction, Error correction & detection, Error correction codes, k-constrained code, Low density parity check codes, low-density parity-check (LDPC) code, Magnetism, Modulation, Parity check codes, Receivers, Storage systems