Details

Autor(en) / Beteiligte

• Yeh, Chien-Hung
• Chang, Kai-Chun
• Lin, Yun-Hsuan
• Chang, Ting-Chang
• Chang, Yen-Cheng
• Chen, Wen-Chung
• Jin, Fu-Yuan
• Ciou, Fong-Min
• Lin, Yu-Shan
• Hung, Wei-Chun
• Huang, Jen-Wei
• Tsai, Tsung-Ming
• Sze, Simon M.

Titel

Analysis of Edge Effect Occurring in Non-Volatile Ferroelectric Transistors

Ist Teil von

• IEEE electron device letters, 2021-03, Vol.42 (3), p.315-318

Ort / Verlag

New York: IEEE

Erscheinungsjahr

2021

Link zum Volltext

• IEEE_Xplore

Quelle

IEEE Xplore

Beschreibungen/Notizen

• This study focuses on the interaction between the oxide layer area of a transistor and its ferroelectric layer area. An experimental comparison of transistor oxide layer area demonstrates that the larger the ratio of oxide to ferroelectric layers, the larger the on/off ratio, thus improving performance. A subsequent experiment aimed to further demonstrate this in different sized devices, and changing the ratio of <inline-formula> <tex-math notation="LaTeX">\text{A}_{\text {HZO}}/\text{A}_{\text {SiO2}} </tex-math></inline-formula> (the area of HfZrO x divided by oxide layer) showed the same tendency as above, but also produced an unexpected finding in that a comparison of on/off ratio exhibits an abnormal electric characteristic. This study discusses this abnormal electric characteristic and proposes an explanatory physical model.