Sie befinden Sich nicht im Netzwerk der Universität Paderborn. Der Zugriff auf elektronische Ressourcen ist gegebenenfalls nur via VPN oder Shibboleth (DFN-AAI) möglich. mehr Informationen...
A novel silicon-based resistive-gate field-effect transistor (ReFET) with metal-insulator-metal-oxide gate stack is proposed. With the abrupt resistance change event from high-resistance state to low-resistance state in the introduced insulator layer, the threshold voltage of ReFET can be suddenly decreased, resulting in an abrupt switching of drain current. The device is capable of sub-60-mV/decade subthreshold slope (SS), as well as MOSFET-comparable ON-current. The fabricated n-type ReFET device with Pt/TiN/TaO x /Poly-Si/SiO 2 gate stack can achieve steep SS of 8 mV/decade. With future materials and threshold voltage optimization, high I ON /I OFF ratio with reduced operation voltage can be expected, which shows that ReFET is a promising candidate for ultralow power applications.