Details

Autor(en) / Beteiligte

• Thakur, Arvind
• Pandey, Rishikesh
• Rai, Shireesh Kumar

Titel

High-performance sub-1 V CMOS voltage reference with low supply voltage

Ist Teil von

• International journal of electronics and communications, 2022-11, Vol.156, p.154392, Article 154392

Ort / Verlag

Elsevier GmbH

Erscheinungsjahr

2022

Quelle

Alma/SFX Local Collection

Beschreibungen/Notizen

• A CMOS voltage reference with low line sensitivity, high PSRR, and low supply voltage is presented. Usually, CMOS voltage references use proportional-to-absolute-temperature (PTAT) and complementary-to-absolute-temperature (CTAT) behaviours to generate temperature-compensated reference voltages. Since the PTAT-behaviour-generator circuit requires more transistors with complex circuitry than the CTAT-behaviour-generator circuit, these voltage references require a large number of transistors. Therefore, this technique does not offer much improvement in the circuit's complexity, power consumption, and area. To overcome these drawbacks, some of the researchers have presented voltage references based on the subtraction of two CTAT behaviours but they have used two different circuits for CTAT voltages/currents. In contrast, only one standard beta-multiplier circuit is used in the proposed design to generate CTAT voltages which further decreases circuit complexity and area. Also, operational amplifiers have been employed in the negative feedback loop to achieve low line sensitivity and high PSRR. The proposed circuit offers an output reference voltage of 350 mV with a temperature coefficient of 31.5 ppm/°C for the temperature varying from −55 °C to 125 °C. The line sensitivity and PSRR are observed as 0.015 %/V (for supply voltage ranging from 0.65 V to 3.5 V) and −85.4 dB (for the frequency of 100 Hz), respectively.